Silicon Semiconductor Technology

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Beschreibung des Forschungsbereiches "Halbleitermaterialsynthese & Prozesstechnologie" in CRIS

Projects:

Entwicklung eines PDMS-basierten Mikrofluidiksystems

GRK1896-A2: Growth and stability of anisotropic nanoparticles in liquids

Liquid cell transmission electron microscopy (LCTEM) is a novel, highly attractive method for in situ studies into dynamic processes of nanoparticulate systems in liquid environment excluding influences of drying effects. For this purpose a small volume of the fluid under investigation is confined between two electron transparent membranes to prevent vaporization in the ultra-high vacuum of an electron microscope. In the context of this project innovative liquid cell architectures are…

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EUV: Pathfinding the perfect EUV mask

Semiconductor industry is pushing for a smaller gate size on the chip. EUV is already used in high-volume manufacturing and delivers resolution of 13 nm lines and spaces with NA 0.33 system. The high-NA of 0.55 will be used in the high-volume manufacturing by 2023. The high-NA system has a resolution of 8 nm lines and spaces. High-NA system features an anamorphic demagnification of 4× in y-direction and 8× x-direction instead of 4× in both directions in NA of 0.33. The combination of smaller features to print and the anamorphic demagnification makes the system more sensitive to variations in the mask design and to optical constants. This work explores the effect of the optical constants’ variations in the mask absorber materials and different mask components’ effects.

This work aims to investigate the effect of the mask in high-NA EUVL (extreme-ultraviolet lithography) on the resulting image quality, which to be printed on the wafer for producing ICs (integrated circuits) and chips. The mask in EUVL contains two main parts; an absorber and a reflective multilayer that works as a Bragg mirror. The effect of both parts and the interaction between them are the core of this thesis. 

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Modelling Nanomechanical Effects in Advanced Lithographic Materials and Processes

The main goal of this work is to model and simulate shrinkage and deformation effects in photoresists during lithographic processing. The finite element method (FEM) is used to model and simulate the mechanical deformation in the photoresist material and the Dr.LiTHO lithography simulator is used to simulate the optical and chemical aspects. Moreover, a machine learning implementaion is introduced which helps predict pattern collapse probabilities making use of training data generated with the help of FEM tools and Dr.LiTHO.

The research project is being worked on as part of an LEB PhD project in collaboration with the Fraunhofer Institute of Integrated Systems and Device Technology.

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Novel development of a slurry-based spray coating technology to create a high temperature and corrosion resistant tantalum carbide protection coating for semiconductor material manufacturing and processing

The rapidly expanding SiC market requires theinstallation of large production capacities for the manufacture of SiC crystalsand SiC devices. This is also associated with a large demand for graphitecomponents, which are subject to a great deal of wear during the growth processesof the SiC crystals and epitaxial layers. The introduction of high temperatureand corrosion resistant protective coatings based on tantalum carbide (TaC) canhelp to save resources, deescalate supply shortage and reduce costs.…

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Deep learning applications for EUV lithographic imaging

This project is dedicated to the exploration of the capabilities of deep learning models for EUV lithography simulations and utilize them to speed-up a variety of computationally intensive applications. A wide range of techniques to optimize the accuracy and data efficency of deep learning models for lithography are also investigated. The developed accurate models and the frameworks for training data optimizations are applied to practical EUV use-cases in addition to experimental SEM images of wafer prints.

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Growth and Curvature Modelling of GaN-on-Si(111) for Vertical Power Devices

Das Forschungsprojekt wird im Rahmen eines LEB-Promotionsvorhabens in Zusammenarbeit mit externen Kooperationspartnern bearbeitet.
High-power switching devices play a key role in applications such as data centres, vehicles and power plants. The main goal in developing novel power devices is to improve the efficiency and reliability of the switching device while keeping costs low. The interest in developing GaN-based power devices stems from the fact that it has improved material properties, i.e., saturation velocity, electron mobility and critical electric field, than SiC and Si. Consequently, power switching devices based on GaN can offer low on-resistance, high breakdown voltage and fast switching.
Growing high quality GaN on Si(111) remains challenging due to high lattice and thermal mismatch leading to high threading dislocation density, severe curvature and cracks on the wafers. Therefore, the stress management in these structures must be fully understood.

In this work, GaN-based structures that can withstand high breakdown voltage while exhibiting low on-resistance are fabricated by metal-organic chemical vapour deposition. The wafers are then delivered to the partners of the YESvGaN project (European funded project) for processing and testing. Further, a curvature model is being developed to predict the wafer shape during growth and after cooling based on the epitaxy process to provide more information on stress management.

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